Feeling down? Then browse some press releases for new silicon solutions! Few things will get you more excited for the future than the amazing possibilities of new application-specific integrated circuits (ASICs). But take a quick scan of recent announcements from Cisco, Nokia and others and you’ll notice one word never shows up: tradeoffs. That’s unfortunate, because any good silicon design optimizes its architecture to achieve certain outcomes for customers—sometimes at the expense of other outcomes. If vendors won’t talk about what they’re optimizing for in their silicon design, they’re not showing the full picture.
At Juniper Networks, one part of a network shouldn’t have to be compromised to improve another. That’s why Juniper has embraced a multi-silicon strategy for years, offering platforms with different chipsets optimized for different roles in the network. Today, we’re continuing this strategy with the announcement of the newest generations of Juniper’s Trio and Express ASICs. As networks grow more complex, it’s a good idea to stick with a philosophy that’s successfully served customers for more than a decade: networks work best when the right tool is chosen for the job.
In networking silicon in particular, any design needs to weigh logical scale against throughput. To increase logical scale across multiple simultaneous dimensions also requires increased memory, but ratcheting up memory to support throughput of tens of terabits per second at the same time requires optimization. Put another way: design a highly flexible ASIC that delivers versatility with logical scale for a wide variety of complex tasks, or design one that delivers amazing throughput in bandwidth-centric roles. But optimizing for both in a single design isn’t possible.
Diversification Drives Specialization
As networks have evolved over the past two decades by supporting more diverse and demanding digital services, operators have increasingly sought out specialized silicon to tackle specific roles. At the highest level, one of two capabilities for optimizing network ASICs is the right tool:
- Flexible Logical Scale: In highly dynamic multi-service edge nodes that deliver consumer broadband and business virtual private network (VPN) functions, the most important requirements are high logical scale and flexibility. At the network edge, platforms need to support complex features for each service offering and use case, such as very large route forwarding tables, flexible tunnel encapsulation, rich quality of service (QoS), firewall security filters and the ability to attach traffic management counters to each service at the same high level of logical scale. This, in turn, drives the need for huge memory sizes that can perform complex database lookups at massive scale, speed and scope for edge roles. To excel at the multi-service edge, very different capabilities are needed.
- High Throughput: In other parts of the network, like forwarding nodes for transport aggregation and core, the script gets reversed. Core nodes don’t have to host the same diversity of network functions, as they don’t directly support logical subscribers or VPNs. But they do need to process huge amounts of traffic to keep up with growing throughput demands. As a result, core nodes need to be optimized to ratchet up bandwidth throughput and forwarding performance with needed pipeline and memory characteristics for known operations such as throughput, filtering, telemetry and sampling capabilities.
Ultimately, silicon design is a multi-variable equation where logical scale and throughput are diametrically opposed variables. Within a given die size and power budget, you can optimize for superlative bandwidth throughput or superlative logical scale. But one can’t increase without decreasing the other.
In this context, it’s hard to understand why some vendors won’t talk about optimization. The ability to make optimizations in networking silicon is desired so platforms optimized for the needs of specific domains at different bandwidth points and service scale points can be used. It’s only by optimizing for different roles in different parts of the network that experience-first networking can be achieved.
Customer Choice Incorporated with the Latest Generation of Juniper Chipsets
For years, Juniper’s silicon strategy has been to give customers the best tool for the job—to provide choice in ASICs for different roles in the network. Juniper made this decision early on after the release of the first Trio chipset for Juniper MX Series routers in 2009. As the industry’s first fully programmable networking ASIC, Trio provided a groundbreaking solution for the multi-service edge. But it quickly became clear that one type of silicon couldn’t satisfy all the different use cases customers needed to address. So, in 2012, Juniper introduced the Express line of ASICs for the PTX Series platforms, developed specifically for high-bandwidth applications in network core and peering use cases.
Networks and ASICs have evolved since then, but those early lessons continue to prove true: more choice is better than less. Networks run better with ASICs optimized for different tasks. Now, we’re applying them again with the latest generations of Juniper chipsets:
- Juniper Trio 6 – Built for the Unknown: With this new chipset, Juniper is shipping the industry’s highest-performing multi-service edge solutions portfolio and the only networking chipset built from the ground up to optimize multi-service use cases.
- The 6th generation of Trio silicon for MX Series routers maximizes logical scale and programmability for the most complex and dynamic edge service nodes
- The solution provides 9.6T line card for the MX10K family
- The ML-enabled Trio 6 silicon provides native support for IPSec, along with integrated MACsec at native line rate
- The Trio 6 also uses 7-nanometer fabrication technology to deliver a 70% improvement in power efficiency compared to previous-generation chipsets
- It is unmatched, state of the art silicon, built for the unknown, with the flexibility to support a wide range of use cases today and in the future
- And, unlike some recently announced ASICs that won’t hit the market for several quarters, the Trio 6 is available right now
- Juniper Express 5: The Juniper Express 5 silicon delivers the industry’s highest non-blocking throughput of 28.8T in a single package. In comparison, Cisco recently announced P100 silicon at 19.2 Tbps which offers 33% less throughput than Juniper’s new Express 5 silicon. Express 5 is a no-compromise silicon for all high throughput use cases for PTX10K series platforms. Express 5 silicon taped out in 2021 and will be available in shipping product at a future date.
- The Express 5’s 28.8T throughput will deliver low-power 36*800G port radix in a fixed form factor
- Built with 7-nm technology, it delivers 45% better power efficiency than previous chipsets
- It beats all KPIs as demonstrated with current-generation PTX EANTC testing
Together, these new ASICs offer the flexibility to deploy platforms optimized for the most demanding logical scale or throughput requirements that different parts of the network can throw at it. Where does that leave the competition? Somewhere in the unoptimized gray area, trying to be a jack-of-all-trades and ending up as master of none.
At Juniper, we’re investing in flexibility and choice, so we can offer customers the best tool for the job. Unlike other vendors, Juniper refuses to insist that one choice is always right.
“As network service demands have grown and diversified, so too have networking platform designs and network architectures. No one chipset can meet all needs all the time – from flexibility and scalability to throughput and performance – and that’s why Juniper’s plan to specialize and optimize its silicon best to meet specific needs at specific points in the network is an ideal customer-centric strategy. The future-proofing of operators’ investments with Juniper’s consistent silicon architecture adds greater value for the operators as they modernize their networks.” – Ray Mota, ACG Research
Building for the Future
Developing new silicon represents an enormous investment, typically requiring three to five years of R&D before a product ever ships. So, it’s not surprising that vendors try to reduce those costs. Standardizing on a single silicon architecture can help do that, but it also means that customers will be forced to compromise. Maybe optimize for best-case throughput and fail RFC 2544 tests with IMIX traffic, like Cisco’s 8201. (See the EANTC results here). Maybe try to shoehorn one chipset into multiple roles, like Nokia, and push ahead on logical-scale at the cost of throughput—falling years behind the competition. Nokia recently announced they’ll finally offer 14.4T per slot in 2022. Meanwhile, Juniper’s been shipping products that deliver that for the last three years. We’ve shipped tens of thousands of 400G ports to more than 200 customers with our 14.4T solution—before Nokia even announced their first 14.4T card. And Juniper’s new Express 5 silicon doubles the throughput that was delivered in 2019.
Or, maybe build a silicon strategy around what’s best for customers instead of what’s most advantageous to the bottom line. At Juniper, we’ve invested in delivering choice and optimization so there is no compromise. With Juniper, you get silicon that:
- Uses a Consistent Architecture: Few things are more disruptive—or expensive—than settling on a product family with an optimized silicon architecture expected to be used for years, only to see a vendor change course. Benefiting from ongoing improvements in performance and scalability across multiple chipset generations, while maintaining consistent behavior and operations should be the outcome. That’s exactly what Juniper has delivered over the past 13+ years. Our innovation cycle flows smoothly from one product generation to the next, with customers moving up to the latest line cards without having to change out platforms or retool and retrain staff.
- Enables Greener Operation: Along the same lines, vendors shouldn’t be put in a position where reducing carbon footprint means overhauling the network. Customers using Juniper ASICs have seen a 95% improvement in power efficiency since Juniper’s first-generation of Trio chipsets.
Choice. Flexibility. The ability to choose the right silicon for the job. Those are the principles guiding Juniper’s silicon strategy and the secret sauce that enables experience-first networking. The competition? Well, there’s a reason they don’t want to talk about the choices they’ve made to optimize their silicon: there just isn’t much to say.